M 31 Collaborates with TSMC to Development 2 nm eUSB 2 IP Development

M 31 Modern Technology Firm (M 31, an international provider of silicon intellectual property (IP), today disclosed that its eUSB 2 PHY IP has in fact attained silicon-proven standing on TSMC’s 3 nm procedure and has successfully ended up tape-out on TSMC’s 2 nm procedure. As a member of TSMC Open Technology System (OIP) IP Collaboration considered that 2012, M 31 has really been honored with TSMC OIP Companion of the Year Honor for 7 successive years. In 2020, M 31 stemmed its eUSB 2 IP choice on the TSMC 7 nm procedure node, additionally enhancing its management in ingenious user interface IP advancement. Ever since, M 31 has actually slowly expanded its eUSB 2 IP profile throughout TSMC’s 5 nm, 3 nm, and most simply recently, 2 nm treatment technologies– carefully straightening with TSMC’s innovative roadmap to raise the adoption of AI-enabled brilliant tools. Looking in breakthrough, M 31 is actively creating the next-generation eUSB 2 Version 2.0 (eUSB 2 V 2 PHY IP, with continuous efforts focused on both TSMC’s 3 nm and 2 nm procedure nodes.

Strengthening its efficiency and honesty on innovative nodes, M 31’s eUSB 2 IP options have in fact been typically taken on by leading globally business in high-end cellphone chipsets and AI-driven image handling applications. Framework on this success, M 31 is presently progressing the growth of eUSB 2 V 2 IP on TSMC’s N 3 and N 2 procedure technologies– raising its in-depth eUSB 2 profile to consist of eUSB 2 V 1, V 2 PHY, and eUSB 2 Repeater treatments. Leveraging the eUSB 2 requirement, eUSB 2 V 2 enhances information transfer prices while maintaining a low-voltage interface and leveraging unequal data transfer advancement– making it possible for TX and RX to run at different info rates. This substantially improves transmission efficiency, making it appropriate for ingrained applications such as AI side computer, clever security, and image handling chips. To fit varied design requirements, eUSB 2 V 2 leverages and boosts the I/O style based upon the eUSB 2 conventional, maintaining information transfer speeds from 480 Mbps as high as 4 8 Gbps. The remedy delivers a comprehensive eUSB 2 system for premium SoCs– optimizing power performance, effectiveness and layout adaptability, while keeping full compatibility with tradition USB 2.0 gizmos.

At the 2025 TSMC North America Modern Technology Seminar, Scott Chang, President of M 31, stated: “With a solid track record of effective USB PHY IP growth and an enduring commitment to development with TSMC, M 31’s eUSB 2 IP has revealed evaluated silicon success throughout TSMC’s leading-edge process advancements. M 31 is pleased to collaborate closely with TSMC to development eUSB 2 IP advancement, motivating consumers to embrace the current user interface approaches for next-generation chip design and enhanced time-to-market.”

“We indulge in to team up with M 31 in driving IP developments to allow future products,” claimed Lipen Yuan, Senior Citizen Supervisor of Advanced Technology Company Development at TSMC. “We excitedly anticipate strengthening our cooperation with OIP companions like M 31 by signing up with forces to sustain innovation in next-generation AI and high-performance computer applications with TSMC’s industry-leading treatment technologies.”